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Source/Drain Engineered Charge-Plasma Junctionless Transistor for the Immune of Line Edge Roughness Effect 期刊论文
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2018, 卷号: 65, 期号: 5, 页码: 1873-1879
作者:  Wan, Wenbo;  Lou, Haijun;  Xiao, Ying;  Lin, Xinnan
收藏  |  浏览/下载：34/0  |  提交时间：2019/11/15
New Understanding of Random Telegraph Noise Amplitude in Tunnel FETs 期刊论文
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017
Chen, Cheng; Huang, Qianqian; Zhu, Jiadi; Zhao, Yang; Guo, Lingyi; Huang, Ru
收藏  |  浏览/下载：9/0  |  提交时间：2017/12/03
Morphologies Control of Inkjet-printed Silver Lines by Substrate Temperature 会议论文
Hawaii, USA, July 31 - August 4, 2017
作者:  Wang CY(王驰远);  Cheng XD(程晓鼎);  Zhu YL(朱云龙);  Zhang L(张磊)
收藏  |  浏览/下载：14/0  |  提交时间：2018/10/08
The immunity of doping-less junctionless transistor variations including the line edge roughness 会议论文
Hong Kong, Hong kong, August 3, 2016 - August 5, 2016
作者:  Wan, Wenbo;  Lou, Haijun;  Xiao, Ying;  Lin, Xinnan
收藏  |  浏览/下载：23/0  |  提交时间：2020/11/15
A Simple Method to Decompose the Amplitudes of Different Random Variation Sources in FinFET Technology 其他
2016-01-01
Jiang, Xiaobo; Wang, Runsheng; Huang, Ru; Wang, Xingsheng; Cheng, Binjie; Asenov, Asen
收藏  |  浏览/下载：1/0  |  提交时间：2017/12/03
A Device-Level Characterization Approach to Quantify the Impacts of Different Random Variation Sources in FinFET Technology 期刊论文
IEEE ELECTRON DEVICE LETTERS, 2016
Jiang, Xiaobo; Guo, Shaofeng; Wang, Runsheng; Wang, Xingsheng; Cheng, Binjie; Asenov, Asen; Huang, Ru
收藏  |  浏览/下载：3/0  |  提交时间：2017/12/04
Line-edge roughness induced single event transient variation in SOI FinFETs 期刊论文
半导体学报（英文版）, 2015
Wu Weikang; An Xia; Jiang Xiaobo; Chen Yehua; Liu Jingjing; Zhang Xing; Huang Ru
收藏  |  浏览/下载：8/0  |  提交时间：2017/12/03
Analysis of EHL Line Contact in Rapid Braking Motion 会议论文
作者:  Du, Lijun;  Hong, Yaoyao;  Qi, Shemiao
收藏  |  浏览/下载：7/0  |  提交时间：2019/12/03
Characterization of nanoline based on SEM images 会议论文
作者:  Wang, Chen-Ying;  Yang, Shu-Ming;  Lin, Qi-Jing;  Jiang, Zhuang-De
收藏  |  浏览/下载：3/0  |  提交时间：2019/12/03
Investigations on Line-Edge Roughness (LER) and Line-Width Roughness (LWR) in Nanoscale CMOS Technology: Part I-Modeling and Simulation Method 期刊论文
ieee电子器件汇刊, 2013
Jiang, Xiaobo; Wang, Runsheng; Yu, Tao; Chen, Jiang; Huang, Ru
收藏  |  浏览/下载：11/0  |  提交时间：2015/11/10

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