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浏览/检索结果: 共3条，第1-3条 帮助 已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择作者升序作者降序题名升序题名降序发表日期升序发表日期降序提交时间升序提交时间降序 Device scaling considerations for sub-90-nm 2-bit/cell split-gate flash memory cell 期刊论文 Solid-State Electronics, 2019, 卷号: 152, 页码: 46-52 作者:  Xu, Zhaozhao;  Liu, Donghua;  Hu, Jun;  Chen, Wenjie;  Qian, Wensheng 收藏  |  浏览/下载：2/0  |  提交时间：2019/11/19 2-bit/cell  Device-scaling  Drain induced barrier lowering effects  Source-side injection  Split gates   Threshold voltage modeling of partially-depleted dual-material surrounding gate field-effect transistor 期刊论文 Hsi-An Chiao Tung Ta Hsueh/Journal of Xi'an Jiaotong University, 2013, 卷号: 47, 期号: [db:dc_citation_issue], 页码: 50-54+109 作者:  Li, Zunchao;  Luo, Cheng;  Wang, Chuang;  Miao, Zhicong;  Zhang, Lili 收藏  |  浏览/下载：2/0  |  提交时间：2019/12/03 Carrier transport efficiency  Cylindrical coordinate systems  Drain induced barrier lowering effects  Numerical simulation software  Partially depleted  Short-channel effect  Surrounding-gate  Threshold voltage modeling   Quasi-SOI MOSFETs - A promising bulk device candidate for extremely scaled era 期刊论文 ieee电子器件汇刊, 2007 Tian, Yu; Xiao, Han; Huang, Ru; Feng, Chuguang; Chan, Mansun; Chen, Baoqin; Wang, Runsheng; Zhang, Xing; Wang, Yangyuan 收藏  |  浏览/下载：3/0  |  提交时间：2015/11/12 CMOS  drain-induced barrier lowering (DIBL)  quasi-SOI  scaling  short-channel effects (SCEs)  SOI  ultrathin  body (UTB)  CMOS DEVICES