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Thermal-aware power-efficient deadline based task allocation in multi-core processor
期刊论文
JOURNAL OF COMPUTATIONAL SCIENCE, 2017, 卷号: 19, 页码: 112-120
作者:
Tyagi, Sumarga Kumar Sah
;
Jain, Deepak Kumar
;
Fernandes, Steven Lawrence
;
Muhuri, Pranab K.
收藏
  |  
浏览/下载:28/0
  |  
提交时间:2019/12/12
Multicore systems
Thermal management
Task allocation
Dynamic voltage and frequency scaling
Real-time constraints
Thermal-aware power-efficient deadline based task allocation in multi-core processor
期刊论文
JOURNAL OF COMPUTATIONAL SCIENCE, 2017, 卷号: 19, 页码: 112-120
作者:
Tyagi, Sumarga Kumar Sah
;
Jain, Deepak Kumar
;
Fernandes, Steven Lawrence
;
Muhuri, Pranab K.
收藏
  |  
浏览/下载:28/0
  |  
提交时间:2019/12/16
Multicore systems
Thermal management
Task allocation
Dynamic voltage and frequency scaling
Real-time constraints
Real-Time Controller Based on FPGA and DSP for Solar Ground Layer Adaptive Optics Prototype System at 1-m NVST
期刊论文
IEEE Photonics Journal, 2017, 卷号: 9, 期号: 2, 页码: 7840009
作者:
Kong, Lin
;
Zhu, Lei
;
Zhang, Lanqiang
;
Bao, Hua
;
Rao, Changhui
收藏
  |  
浏览/下载:39/0
  |  
提交时间:2018/11/20
Adaptive control systems - Controllers - Digital signal processing - Digital signal processors - Electric appliances - Field programmable gate arrays (FPGA) - Multicore programming - Parallel processing systems - Signal processing - Timing jitter - Wavefronts
An approach to build cycle accurate full system VLIW simulation platform
期刊论文
SIMULATION MODELLING PRACTICE AND THEORY, 2016, 卷号: 67, 期号: 2016, 页码: 14-28
作者:
Yang, Lei
;
Wang, Lei
;
Zhang, Xing
;
Wang, DongLin
收藏
  |  
浏览/下载:13/0
  |  
提交时间:2016/12/26
Vliw Simulation
Cycle Accurate
Heterogeneous Computing
Predicting Cross-Core Performance Interference on Multicore Processors with Regression Analysis
期刊论文
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2016, 卷号: 27, 期号: 5, 页码: 1443-1456
作者:
Zhao, Jiacheng
;
Cui, Huimin
;
Xue, Jingling
;
Feng, Xiaobing
收藏
  |  
浏览/下载:12/0
  |  
提交时间:2019/12/13
Cross-core performance interference
memory subsystems
multicore processors
performance analysis
prediction model
Accelerating Irregular Computation in Massive Short Reads Mapping on FPGA Co-Processor
期刊论文
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2016, 卷号: 27, 期号: 5, 页码: 1253-1264
作者:
Tan, Guangming
;
Zhang, Chunming
;
Tang, Wen
;
Zhang, Peiheng
;
Sun, Ninghui
收藏
  |  
浏览/下载:16/0
  |  
提交时间:2019/12/13
Short read mapping
irregular computation
FPGA
multicore parallelism
Wide Operational Range Processor Power Delivery Design for Both Super-Threshold Voltage and Near-Threshold Voltage Computing
期刊论文
JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY, 2016, 卷号: 31, 期号: 2, 页码: 253-266
作者:
He, Xin
;
Yan, Gui-Hai
;
Han, Yin-He
;
Li, Xiao-Wei
收藏
  |  
浏览/下载:17/0
  |  
提交时间:2019/12/13
voltage regulator
power delivery
near-threshold computing
multicore processor
A Robust Energy/Area-Efficient Forwarded-Clock Receiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects
期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 2, 页码: 578-586
作者:
Chen, Shuai
;
Li, Hao
;
Chiang, Patrick Yin
收藏
  |  
浏览/下载:21/0
  |  
提交时间:2019/12/13
All-digital clock and data recovery (ADCDR)
delay-locked loop (DLL)
forwarded-clock (FC) receiver
high-density interconnect
jitter tolerance
multicore processor
process variation
voltage and temperature drift
Asynchronous Dual-Thread Communication Module with Parent/Children Resource Management in Multi-core Architecture
会议论文
作者:
Xu, Qingfei
;
Yang, Xinyu
收藏
  |  
浏览/下载:5/0
  |  
提交时间:2019/11/26
Communication mechanisms
Communication performance
Communication processors
Cross-domain communication
dual-thread module
Multicore architectures
Processor performance
Resource management
A Robust Energy/Area-Efficient Forwarded-Clock Receiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects
期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2016, 卷号: 24, 期号: 2
作者:
Chen, Shuai
;
Li, Hao
;
Chiang, Patrick Yin
收藏
  |  
浏览/下载:5/0
  |  
提交时间:2019/12/13
All-digital clock and data recovery (ADCDR)
delay-locked loop (DLL)
forwarded-clock (FC) receiver
high-density interconnect
jitter tolerance
multicore processor
process variation
voltage and temperature drift
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