An ASIC chip with pipeline ADCs for CCD sensor imaging system

doi:10.1016/j.sna.2018.06.014

CORC > 长春光学精密机械与物理研究所 > 中国科学院长春光学精密机械与物理研究所

	An ASIC chip with pipeline ADCs for CCD sensor imaging system
	Sun, Z. Y.; Zhang, D.; Fang, W.
刊名	Sensors and Actuators a-Physical
	2018
卷号	279 页码:284-292
关键词	ASIC ADC Photoelectric sensor CDS CCD Image cmos circuit camera sfdr Engineering Instruments & Instrumentation
ISSN号	0924-4247
DOI	10.1016/j.sna.2018.06.014
英文摘要	This paper introduces the design of an application specific integrated circuit (ASIC). It will conduct the image processing for photoelectric image sensor charge coupled device (CCD). The ASIC can convert the analog signal of CCD into a suitable digital signal, which is used as the input for the next stage. To realize the ASIC, a two-channel analog to digital converter (ADC) with the speed of 40 MS/s-100 MS/s and a low voltage differential signaling (LVDS) has been proposed. In the ASIC, the correlated double sampling (CDS) has been integrated into the programmable gain amplifier (PGA). A novel CDS circuit is employed to reduce the amplifier gain error. The unique design reduces the size of ASIC by sharing the same operational amplifier (OPA) block. In the low sampling rate of 40 MHz, the spurious-free dynamic range (SFDR) is larger than 91 dB, and the signal-to-noise-ratio (SNR) is more than 79 dB. In the high sampling rate of 100 MHz, the ADC achieved a high SFDR of 92.2 dB and SNR of 81.47 dB. With a 0.13-mu m 1P-6M CMOS process, the ASIC only occupies on the die with a size of 21.16 mm(2). With the power supply of 3.3 V and 1.8 V, the power consumption is as low as 405 mW. By using the ASIC with the specially designed ADC, the saturated output image reaches a high SNR of 52.2 dB. (C) 2018 Elsevier B.V. All rights reserved.
内容类型	期刊论文
源URL	[http://ir.ciomp.ac.cn/handle/181722/60899]
专题	中国科学院长春光学精密机械与物理研究所
推荐引用方式 GB/T 7714	Sun, Z. Y.,Zhang, D.,Fang, W.. An ASIC chip with pipeline ADCs for CCD sensor imaging system[J]. Sensors and Actuators a-Physical,2018,279:284-292.
APA	Sun, Z. Y.,Zhang, D.,&Fang, W..(2018).An ASIC chip with pipeline ADCs for CCD sensor imaging system.Sensors and Actuators a-Physical,279,284-292.
MLA	Sun, Z. Y.,et al."An ASIC chip with pipeline ADCs for CCD sensor imaging system".Sensors and Actuators a-Physical 279(2018):284-292.