Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology

doi:10.1007/s11432-020-3227-1

	Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology
	Zou, Xingqi 3,4; Xu, Sheng 2; Chen, Xiaoming 1,4; Yan, Liang 1,4; Han, Yinhe 1,4
刊名	SCIENCE CHINA-INFORMATION SCIENCES
	2021-06-01
卷号	64 期号:6 页码:10
关键词	processing-in-memory (PIM) von Neumann bottleneck memory wall PIM simulator architecture-level PIM
ISSN号	1674-733X
DOI	10.1007/s11432-020-3227-1
英文摘要	The "memory wall" problem or so-called von Neumann bottleneck limits the efficiency of conventional computer architectures, which move data from memory to CPU for computation; these architectures cannot meet the demands of the emerging memory-intensive applications. Processing-in-memory (PIM) has been proposed as a promising solution to break the von Neumann bottleneck by minimizing data movement between memory hierarchies. This study focuses on prior art of architecture level DRAM PIM technologies and their implementation. The key challenges and mainstream solutions of PIM are summarized and introduced. The relative limitations of PIM simulation are discussed, as well as four conventional PIM simulators. Finally, research directions and perspectives are proposed for future development.
资助项目	National Key R&D Program of China[2018YFA0701500] ; Zhejiang Lab[2019KC0AB010] ; Key Research Program of Frontier Sciences, CAS[ZDBS-LY-JSC012] ; Strategic Priority Research Program of CAS[XDB44000000] ; Youth Innovation Promotion Association CAS ; Anhui Natural Science Foundation[2008085QF330] ; Research Program of Anhui Normal University[751968] ; Beijing Academy of Artificial Intelligence (BAAI)
WOS研究方向	Computer Science ; Engineering
语种	英语
出版者	SCIENCE PRESS
WOS记录号	WOS:000648634300001
内容类型	期刊论文
源URL	[http://119.78.100.204/handle/2XEOYT63/17760]
专题	中国科学院计算技术研究所
通讯作者	Xu, Sheng; Chen, Xiaoming; Han, Yinhe
作者单位	1.Univ Chinese Acad Sci, Beijing 101408, Peoples R China 2.Anhui Normal Univ, Dept Comp Technol & Informat, Wuhu 241002, Peoples R China 3.Zhejiang Lab, Hangzhou 311121, Peoples R China 4.Chinese Acad Sci, Inst Comp Technol, Beijing 100190, Peoples R China
推荐引用方式 GB/T 7714	Zou, Xingqi,Xu, Sheng,Chen, Xiaoming,et al. Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology[J]. SCIENCE CHINA-INFORMATION SCIENCES,2021,64(6):10.
APA	Zou, Xingqi,Xu, Sheng,Chen, Xiaoming,Yan, Liang,&Han, Yinhe.(2021).Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology.SCIENCE CHINA-INFORMATION SCIENCES,64(6),10.
MLA	Zou, Xingqi,et al."Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology".SCIENCE CHINA-INFORMATION SCIENCES 64.6(2021):10.