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	1.5 bit substage circuit for charge domain pipelined ADCs
	Huang, Songren; Chen, Zhenhai; Zhang, Hong; Li, Xue; Qian, Hongwen; Yu, Zongguang
刊名	Xi'an Dianzi Keji Daxue Xuebao/Journal of Xidian University
	2016
卷号	43期号:[db:dc_citation_issue]页码:170-175
关键词	Charge domain CMOS technology Pipelined analog-to-digital converter Residue charges Sampling frequencies Signal to noise and distortions Sinusoidal frequency Spurious free dynamic range
ISSN号	1001-2400
DOI	[db:dc_identifier_doi]
URL标识	查看原文
WOS记录号	[DB:DC_IDENTIFIER_WOSID]
内容类型	期刊论文
URI标识	http://www.corc.org.cn/handle/1471x/3222983
专题	西安交通大学
推荐引用方式 GB/T 7714	Huang, Songren,Chen, Zhenhai,Zhang, Hong,et al. 1.5 bit substage circuit for charge domain pipelined ADCs[J]. Xi'an Dianzi Keji Daxue Xuebao/Journal of Xidian University,2016,43([db:dc_citation_issue]):170-175.
APA	Huang, Songren,Chen, Zhenhai,Zhang, Hong,Li, Xue,Qian, Hongwen,&Yu, Zongguang.(2016).1.5 bit substage circuit for charge domain pipelined ADCs.Xi'an Dianzi Keji Daxue Xuebao/Journal of Xidian University,43([db:dc_citation_issue]),170-175.
MLA	Huang, Songren,et al."1.5 bit substage circuit for charge domain pipelined ADCs".Xi'an Dianzi Keji Daxue Xuebao/Journal of Xidian University 43.[db:dc_citation_issue](2016):170-175.

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