Simulation of the RRAM-based Flip-Flops with Data Retention | |
Li, Mu ; Huang, Peng ; Shen, Lei ; Zhou, Zheng ; Kang, Jin-Feng ; Liu, Xiao-Yan | |
2016 | |
关键词 | RRAM non-volatile flip-flop IoT 1T1R SPICE MODEL |
英文摘要 | A RRAM-based non-volatile flip-flop (NVFF) is designed to meet energy efficiency requirement for standby-power-critical applications in the deployment solution of IoT (Internet of Things). Adding only a pair of 1T1R cell into slave latch of a traditional FF can cut off the standby leakage at the cost of 4pJ write energy, and 20ps data retention time upon ideal power-on. The NVFF circuit is simulated and analyzed in HSPICE with a SPICE compact model of oxide-based RRAM on the conductive filament evolution model.; CPCI-S(ISTP); phwang@pku.edu.cn; xyliu@ime.pku.edu.cn |
语种 | 英语 |
出处 | 7th IEEE International Nanoelectronics Conference |
内容类型 | 其他 |
源URL | [http://ir.pku.edu.cn/handle/20.500.11897/460104] |
专题 | 信息科学技术学院 |
推荐引用方式 GB/T 7714 | Li, Mu,Huang, Peng,Shen, Lei,et al. Simulation of the RRAM-based Flip-Flops with Data Retention. 2016-01-01. |
个性服务 |
查看访问统计 |
相关权益政策 |
暂无数据 |
收藏/分享 |
除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。
修改评论