A Fast and Accurate Approach for Common Path Pessimism Removal in Static Timing Analysis | |
Jin, Baihong ; Luo, Guojie ; Zhang, Wentai | |
2016 | |
英文摘要 | The dual-mode delay model, while being effective for characterizing on-chip timing variations, also yields timing analysis results that are overly pessimistic due to the Common Path Pessimism (CPP). In this paper, we develop a fast and accurate block-based algorithm for removing this pessimism in timing analysis, when the dual-mode delay model is used. We illustrate the effectiveness of our algorithm on a set of benchmarks from the TAU 2014 Contest [1].; CPCI-S(ISTP); happyucb@gmail.com; gluo@pku.edu.cn; rchardx@gmail.com; 2623-2626 |
语种 | 英语 |
出处 | IEEE International Symposium on Circuits and Systems (ISCAS) |
内容类型 | 其他 |
源URL | [http://ir.pku.edu.cn/handle/20.500.11897/459965] ![]() |
专题 | 信息科学技术学院 |
推荐引用方式 GB/T 7714 | Jin, Baihong,Luo, Guojie,Zhang, Wentai. A Fast and Accurate Approach for Common Path Pessimism Removal in Static Timing Analysis. 2016-01-01. |
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