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	The design of HIMAC coprocessor based on HINOC 2.0
	Chen, Deng ; Pan, Weitao ; Zhang, Jinyuan ; Liu, Chun ; Qiu, Zhiliang ; Zhang, Shi ; Zhang, Bing ; Yang, Chun ; Zhang, Cheng
	2014
英文摘要	In this paper, we introduced a hardware acceleration coprocessor design of HIMAC 2.0 in HINOC 2.0 system. The main function of HIMAC 2.0 have been detailed and compared with corresponding part of HINOC 1.0. By building the self-testing platform and designing the test scheme, the design, which has been simulated and has passed the FPGA verification, realizes 1Gbps data transmission between HIMAC 2.0 and Ethernet. ? 2014 IEEE.; EI; October; 1618-1621; 2015-January
语种	英语
出处	2014 12th IEEE International Conference on Signal Processing, ICSP 2014
DOI标识	10.1109/ICOSP.2014.7015269
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/423767]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Chen, Deng,Pan, Weitao,Zhang, Jinyuan,et al. The design of HIMAC coprocessor based on HINOC 2.0. 2014-01-01.

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