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	Advances of chip-scale atomic clock in Peking University
	Zhao, Jianye ; Zhang, Yaolin ; Lu, Haoyuan ; Hou, Dong ; Zhang, Shuangyou ; Wang, Zhong
	2015
英文摘要	The authors are developing chip-scale atomic clocks (CSACs) based on the85Rb coherent population trap (CPT) transition. As an intermediate milestone, we have developed a miniature atomic clock prototype. In this paper, we report on the design combing the miniature physics part, low-power digital control circuits and low-power microwave system, and the process that enable an atomic clock to be made with an overall size of 20 cm3volume, power consumption about 400 mWatts, and an Allen Deviation at 100 s of 2.9E-11. ? 2015 IEEE.; EI; 462-464
语种	中文
出处	2015 Joint Conference of the IEEE International Frequency Control Symposium and the European Frequency and Time Forum, FCS 2015
DOI标识	10.1109/FCS.2015.7138882
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/423530]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Zhao, Jianye,Zhang, Yaolin,Lu, Haoyuan,et al. Advances of chip-scale atomic clock in Peking University. 2015-01-01.

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