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	Predictive modeling of capacitance and resistance in gate-all-around cylindrical nanowire MOSFETs for parasitic design optimization
	Xu, Qiumin ; Zou, Jibin ; Luo, Jieyin ; Wang, Runsheng ; Huang, Ru
	2010
英文摘要	This paper presents a predictive electrostatic capacitance and resistance compact model of multiple gate MOSFET with cylindrical conducting channels, taking into account parasitic effects, quantum confinement and quasi-ballistic effects. The model incorporates the dependence of channel length, gate height and width, gate-to-contact spacing, nanowire size, multiple channels, as well as 1-D ultra-narrow source/drain extension (SDE) doping profile. The proposed non-iterative electrostatic model is successfully verified, and can be used to predict nanowire-based circuit performance. Based on the analytical model, we can further examine which parasitic components are affecting the delay. Results revealed that Cside, Cof, Rsd, RQ are dominant factors and should be treated as a major design concern. Among all the parameters, Lsd, Tg and Ndop are essentially important in parasitic design optimization. By selectively modifying these parameters, parasitic effect is evidently reduced. ?2010 IEEE.; EI; 0
语种	英语
DOI标识	10.1109/ICSICT.2010.5667822
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/295486]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Xu, Qiumin,Zou, Jibin,Luo, Jieyin,et al. Predictive modeling of capacitance and resistance in gate-all-around cylindrical nanowire MOSFETs for parasitic design optimization. 2010-01-01.

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