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	A CMOS W-band ��4 frequency multiplier with cascading push-pull frequency doublers
	Ye, Le ; Liao, Huailin ; Huang, Ru
	2012
英文摘要	This letter presents a CMOS W-band ??4 frequency multiplier with two cascading push-pull frequency doublers for a W-band frequency synthesizer. A pseudodifferential class-B biased cascode amplifier is adopted for the push-pull frequency doublers to achieve high fundamental rejection and low power consumption. The stacked coplanar spiral transformers are utilized for AC-coupling and single-to-differential transformation. It is fabricated in 65nm CMOS, consumes 16mW from 1.5V power supply, and occupies 0.342mm2. Limited by the frequency range of measurement, the measured output frequency covers from 75 to 110GHz with maximum output power of -14.3dBm at 85.5GHz. ? 2012 IEEE.; EI; 0
语种	英语
DOI标识	10.1109/APMC.2012.6421534
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/294649]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Ye, Le,Liao, Huailin,Huang, Ru. A CMOS W-band ��4 frequency multiplier with cascading push-pull frequency doublers. 2012-01-01.

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