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	A Low Power High Speed ROIC Design for 1024x1024 IRFPA with Novel Readout Stage
	Liu, Chang ; Lu, Wengao ; Chen, Zhongjian ; Bian, Haimei ; Ji, Lijiu
	2008
关键词	ARRAY
英文摘要	A low power high speed Read-Out Integrated Circuit (ROIC) for a short-wave Infra-Red Focal Plane Array (IRFPA) is designed as a prototype for 1024x1024 image system. Ripple integration and readout scheme as well as highly efficient power management are introduced to this design in order to decrease total power. To further increase the readout speed while decrease the power dissipation, a novel readout stage is proposed and adopted in this circuit. By using the new structure, the ROIC achieves a data rate of 10M/s per channel, with the total power dissipation of 56mW; http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000271122100078&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=8e1609b174ce4e31116a60747a720701 ; Engineering, Electrical & Electronic; CPCI-S(ISTP); 0
语种	英语
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/293500]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Liu, Chang,Lu, Wengao,Chen, Zhongjian,et al. A Low Power High Speed ROIC Design for 1024x1024 IRFPA with Novel Readout Stage. 2008-01-01.

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