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	A Fully Integrated 60GHz Four Channel CMOS Receiver with 7GHz Ultra-Wide Bandwidth for IEEE 802.11ad Standard
	ZHANG Lei ; ZHOU Chunyuan ; WANG Hongrui ; WANG Yan ; QIAN He ; YU Zhiping ; ZHANG Lei ; ZHOU Chunyuan ; WANG Hongrui ; WANG Yan ; QIAN He ; YU Zhiping
	2016-03-30 ; 2016-03-30
关键词	CMOS 60GHz receiver four channel LNA TN432
其他题名	A Fully Integrated 60GHz Four Channel CMOS Receiver with 7GHz Ultra-Wide Bandwidth for IEEE 802.11ad Standard
中文摘要	In this paper, a fully integrated CMOS receiver frontend for high-speed short range wireless applications centering at 60 GHz millimeter wave(mmW) band is designed and implemented in 90 nm CMOS technology. The 60 GHz receiver is designed based on the super-heterodyne architecture consisting of a low noise amplifier(LNA) with inter-stage peaking technique, a singlebalanced RF mixer, an IF amplifier, and a double-balanced I/Q down-conversion IF mixer. The proposed 60 GHz receiver frontend derives from the sliding-IF structure and is designed with 7GHz ultra-wide bandwidth around 60 GHz, supporting four 2.16 GHz receiving channels from IEEE 802.11 ad standard for next generation high speed WiFi applications. Measured results show that the entire receiver achieves a peak gain of 12 dB and an input 1-dB compression point of-14.5dBm, with a noise figure of lower than 7dB, while consumes a total DC current of only 60 mA from a 1.2V voltage supply.; In this paper, a fully integrated CMOS receiver frontend for high-speed short range wireless applications centering at 60 GHz millimeter wave(mmW) band is designed and implemented in 90 nm CMOS technology. The 60 GHz receiver is designed based on the super-heterodyne architecture consisting of a low noise amplifier(LNA) with inter-stage peaking technique, a singlebalanced RF mixer, an IF amplifier, and a double-balanced I/Q down-conversion IF mixer. The proposed 60 GHz receiver frontend derives from the sliding-IF structure and is designed with 7GHz ultra-wide bandwidth around 60 GHz, supporting four 2.16 GHz receiving channels from IEEE 802.11 ad standard for next generation high speed WiFi applications. Measured results show that the entire receiver achieves a peak gain of 12 dB and an input 1-dB compression point of-14.5dBm, with a noise figure of lower than 7dB, while consumes a total DC current of only 60 mA from a 1.2V voltage supply.
语种	英语 ; 英语
内容类型	期刊论文
源URL	[http://ir.lib.tsinghua.edu.cn/ir/item.do?handle=123456789/147044]
专题	清华大学
推荐引用方式 GB/T 7714	ZHANG Lei,ZHOU Chunyuan,WANG Hongrui,et al. A Fully Integrated 60GHz Four Channel CMOS Receiver with 7GHz Ultra-Wide Bandwidth for IEEE 802.11ad Standard[J],2016, 2016.
APA	ZHANG Lei.,ZHOU Chunyuan.,WANG Hongrui.,WANG Yan.,QIAN He.,...&YU Zhiping.(2016).A Fully Integrated 60GHz Four Channel CMOS Receiver with 7GHz Ultra-Wide Bandwidth for IEEE 802.11ad Standard..
MLA	ZHANG Lei,et al."A Fully Integrated 60GHz Four Channel CMOS Receiver with 7GHz Ultra-Wide Bandwidth for IEEE 802.11ad Standard".(2016).

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